1. Field of the Invention
The present invention relates to a frequency synthesizer including PLL using processing of digital signals.
2. Description of the Related Art
As one of standard signal generators, a frequency synthesizer using PLL (Phase Locked Loop) is known, and its application includes, for instance, a local oscillating unit in a mobile terminal, a test signal source of a radio communication equipment, a broadcast equipment, and so on. When applied in a communication field, a frequency synthesizer is required to generate little noise in order to avoid interference with other channels and is desirably capable of setting a frequency as finely as possible under the circumstances where radio waves are overcrowded.
Therefore, the present applicant developed a frequency synthesizer satisfying these requirements yet having a simple circuit structure and this art has already been disclosed in Patent Document 1 and so on. For example, in a method of Patent Document 1, an output signal of a voltage-controlled oscillator is A/D (analog/digital) converted to generate a rotating vector corresponding to the output signal, and a rotating vector for phase comparison with the aforesaid rotating vector is generated. A phase comparison result is D/A converted after passing through a loop filter, and an obtained analog signal is input as a control voltage to the voltage-controlled oscillator.
Such a device, however, has a problem that its circuit is complicated since, after the A/D (analog/digital) conversion, the resulting digital signal is processed to be D/A converted. Moreover, in order to generate the rotating vector for the phase comparison, a table for storing digital data on a complex plane is necessary.    [Patent Document 1] Japanese Patent Application Laid-open No. 2007-74291